Abstract
Pushing the Boundaries: Design and Simulation Approach of Negative Capacitance Nanosheet FETs with Ferroelectric and Dielectric Spacers at the Sub-3 nm Technology Node for Analog/RF/Mixed Signal Applications
Full Text 
Sign-in/Register to access full text options
Sign-in/Register to access full text options 
Published version (
Free)
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
