Abstract
We demonstrate a power-added efficiency of 53.5% at a very low idling current of 13 mA with a drain bias of 3 V in a proposed power amplifier. This amplifier meets the standards for the 1.9 GHz Japanese Personal Handy-phone System (PHS) which requires highly linear amplifiers, and this is the highest power-added efficiency and the lowest idling current so far reported. The proposed power amplifier uses a pseudomorphic high electron mobility transistor (PHEMT) which provides high transconductance, high linearity, and low idling current operation. This PHEMT was fabricated by using advanced power-device technology: the GaAs-InGaAs-GaAs PHEMT structure has a 0.35 /spl mu/m gate made using phase-shifting lithography and a high In mole ratio (0.35) InGaAs channel.
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