Pseudo-online testing methodologies for various components of field programmable gate arrays

Abstract

This paper describes novel pseudo-online built-in self-test based techniques for detecting and locating multiple faults in lookup tables (LUTs), interconnects and dedicated clock lines of field programmable gate arrays (FPGAs). The techniques use the partial reconfiguration capabilities of modern FPGAs. The methods proposed in this paper find extensive applications in safety critical systems like space probes, which comprises of several subcircuits mapped onto the FPGA and employs online checkers to report misbehaviour of any of these subcircuits. When an online checker reports misbehaviour of one such subcircuit, the methods proposed in this paper attempt to detect and locate the faults, if any, within the faulty subcircuit without shutting down the other subcircuits. The methods presented in the paper preserve the routing structure of the configured application in-place. Experimentally, it is shown that the proposed methods provide good fault-coverage in identifying faults in LUTs, interconnects and dedicated clock lines.