Abstract
This paper describes a pseudorandom pattern generator for the random pattern test of combinational circuits. Suppose that a fractionp of the possible patterns detects some fault and the generator generates L patterns to test the circuit. Then the probability that the generator generates a pattern that tests the fault is at leastpL/(pL + 1). The only assumption is that all values of the seed of the generator are equally likely. The seed is twice as long as a single pattern. The generator is less than twice as expensive as a linear feedback shift register. Thus, it can be used in practice. More complicated generators that achieve a better bound are also discussed.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
