Abstract

In this paper, a new tunnel FET (TFET)-based power management circuit (PMC) is proposed for weak dc energy harvesting sources. Thanks to their particular carrier injection mechanisms, TFETs can be used to design efficient energy harvesting circuits by enabling the power extraction from sources which are not only at very low voltage levels (sub-0.1 V) but also at very low power levels (a few nW). As TFET devices are designed as reverse-biased diodes, changes in conventional circuit topologies are required in order to take full advantage of these emerging devices. The circuit design techniques proposed in this paper represent an improvement in output voltage and input power range with respect to previously published TFET-based PMCs. Simulation results show that the TFET-based PMC can sustain itself from a 2.5 nW@50 mV dc source, powering a load at 0.5 V with 29% of efficiency.

Highlights

  • In order to extract the maximum power from an energy harvesting (EH) source, the input impedance of the boost converter should equal the impedance of the source

  • This work presents the design of a TFET-based startup and controller circuits with power consumption as low as 1.2 nW

  • This example shows the potential for III-V heterojunction TFET technology for efficient power management units for energy harvesting applications in the nW range

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Summary

INTRODUCTION

Thanks to the miniaturization of embedded systems and the consequent reduction in their power consumption, the harvesting of surrounding energy to directly power the electronics or complement the battery has been a topic of intense research as shown by recent works [1]–[4]. The Band-to-band Tunneling (BTBT) carrier injection mechanism characteristic of the Tunnel-FET (TFET) device makes it an interesting technology for ultra-low voltage and power conversion. This property enables an inverse subthreshold slope (SS) below 60 mV/dec (at room temperature) and a low leakage current, which improves the device electrical characteristics at sub-0.25 V compared to conventional CMOS devices [9]–[12]. Is active) and large voltage differences between the drain and source junctions of that TFET (output VOUT and switching node Vin of the converter) resulted in a PMC with large reverse losses constraining its voltage and power operation. The structure of this work is as follows: in Section II the main electrical characteristics of TFET devices are summarized; Section III describes the behavior of the proposed TFET-PMC; Section IV presents the simulation results; and Section V presents the main conclusions of the work

TUNNEL FET CHARACTERISTICS
SIMULATION RESULTS
CONCLUSION
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