Abstract

Nowadays Handheld multimedia devices demand is growing rapidly, as the demand for mobility in work and lifestyle increases. Power consumption has become the paramount concern in the design of Handheld multimedia battery-operated devices. Approximate computing promises energy efficiency computing paradigms when small quality degradation is permissible. Most multimedia processing is image or video processing, where the end user is a human. The imperceptibility of the human visual system is to allow the output of this processing to be approximate rather than accurate. This research paper proposed an energy-efficient Moving Picture Experts Group 4 (MPEG-4) video decoder architecture with a circuit-level approximate method for Handhandle multimedia devices. Hence, in this research work instead of using conventional 6T memory cells during video decoding processing, an approximate Hybrid 6T/8T memory architecture is proposed, where the 8-bit Luminance pixels are stored favourably in consonance with their effect on the output quality. The higher order luminance bits (MSBs) require high stability and thus these bits are stored in the 8T bit cells and the remaining bits (LSBs) are stored in the conventional 6T bit cells for more optimal configurations compared with previous work. The failure probability of 6T cells is significantly large 0.0988 at 600 mV supply voltage (as compared to 0.28*10^-2 at 800 mV supply voltage), leading to a decrease in the output quality of the decoded video. The hybrid memory matrix formulation calculates that storing higher-order MSB bits in highly stable memory cells will provide high-quality video processing compared to the conventional technique because the human eye is more susceptible to higher-order luminance bits. The proposed approximate 6T/8T hybrid memory units, and evaluate them to demonstrate the efficacy of our approach. Simulations result indicate power savings of up to 50% with an insignificant loss in output quality (3.6 dB) when compared to the conventional memory unit. Compared to the hybrid and conventional 6T memory array at 600 mV supply voltage, the worst minimum PSNR is 15.04 dB improved.

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