Proposal of Highly Efficient Memory Access Method Using Locked-Cache on Soft-Core Processor with SIMD Operations

Abstract

To realize a highly efficient embedded system employing an enhanced soft-core processor with SIMD operations, we are developing the MIQS (MIPS Instruction processor with Quadword SIMD extension) system. Generally, in many embedded systems using FPGA and memory devices, relatively low bandwidth restricts memory access performance and the low memory performance limits the system performance even though high-performance operations are implemented on the FPGA device. We introduce a high-performance on-chip memory system on the MIQS system to reduce the number of accesses to the off-chip memory in order to improve the system performance. This paper proposes a highly efficient memory access method using a locked-cache. This paper also discusses implementation issues of the proposed method and extends the instruction set to control the locked-cache. As our preliminary evaluation to estimate the effectiveness of the on-chip memory systems, we run four application programs on two configurations of the MIQS systems, one has scratch pad memory (SPM) and the other one has an ordinal cache, respectively. The results show that the best configuration of on-chip memory varies depending on the application.