Abstract
In this paper, we propose a (255, 231) product Reed-Solomon(RS) code for non-volatile NAND flash memory systems. Reed-Solomon codes are the most diversely used in data storage systems, but powerful for burst errors only. In order to correct multiple random errors and burst errors, another efficient decoding algorithms are required. The product code composing of column-wise Reed-Solomon codes and row-wise Reed-Solomon codes may allow to decode multiple errors beyond their error correction capability. The proposed code consists of two shortened Reed-Solomon codes and a conventional Reed-Solomon code. We implement the proposed coding scheme on a FPGA-based simulator with using an Altera Stratix II FPGA device. The proposed code can correct 16 symbol errors. For 8-bit symbol memory system, the code has the coding gain of 1.8 dB and the bandwidth of 1.07 Gbps when operated at 290 MHz with the power consumption of 26.4 mW.
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