Process-aware circuit simulation using machine learning compact models for metal oxide semiconductor capacitors under illumination (Conference Presentation)

Abstract

Machine learning (ML) based compact device modeling provides the opportunity for process-aware device modeling and thus process-aware circuit simulation. In contrast, incorporating semiconductor manufacturing parameters into compact models (CM) and subsequent circuit simulations using pure physics-based CM is difficult. We demonstrate process-aware circuit simulation where the effect of plasma treatment and thermal annealing can be directly reflected on the circuit output in SPICE transient simulation. The Verilog-A model input is V, frequency(f), area(A), and process conditions, i.e., plasma surface treatment (PST) and post-metal annealing (PMA). The MOSCAP capacitance-voltage (CV) characteristics under illumination are described by ML compact models.