Process validation test of CNTFET using Stanford model

Abstract

ABSTRACT Process validation test (PVT) helps to predict the response of a device to various figure of merit (FOM) parameters, such as diameter (process), supply voltage, and temperature. In this paper, the Stanford model is modified to investigate the effect of temperature, nanotube diameter, etc. on the current-voltage characteristics, drain current, transconductance, threshold voltage, subthreshold swing, and conductance of Carbon Nanotube Field Effect Transistors (CNTFETs). To study different parameters in terms of temperature in CNTFETs, we simulate different circuits by adding temperature-dependent voltage/current equations and defining temperature as a parameter in the Stanford model. The results show that an increase in temperature results in higher subthreshold swing, lower on/off current ratio, and lower threshold voltage. Moreover, by adding the variable diameter to the model, we examine its effect on different CNTFET parameters. As diameter increases, both the on/off current ratio and subthreshold swing increase, so the net effect is almost the same. CNTFET noise model is translated in Verilog-A, and then implemented in the ADS simulator. The results show that the shot noise is more noticeable at high frequencies and the flicker noise at low frequencies. Moreover, the noise figure of CNTFET is higher at lower frequencies.