Abstract

Carbon Nano-Tube Field Effect Transistors (CNFETs) are better in performance compared to traditional CMOS-FET. It is due to their high current driving ability, low power delay product, ballistic transport and improved thermal constancy. Logical Effort (LE) technique is used for immediate as well as precise estimation of delay in CMOS circuits. Even though CNFETs have high switching and current driving capability than conventional CMOS FET, many factors can disturb the performance of CNFETs which include parasitic capacitance, radiation, leakage current etc. Some of the factors can be effectively controlled by optimizing the design parameters of CNFET. The capacitance and delay are greatly dependent upon diameter and pitch of the carbon nanotubes. In case, if any increase in diameter of the carbon nano tubes shrinks the pitch of carbon nano tubes, this will lead to increase of inter-capacitance between the CNTs. Therefore, an optimization principle should be mostly needed to forecast the optimal diameter and pitch of CNFETs with maximum yield and minimum delay and capacitance. The optimization is achieved with the help of whale optimization algorithm. CNFETs specific parameters, such as pitch, width and diameter of CNTs are used to predict power, inter capacitance, fringe capacitance, delay comparison and current vs. voltage characteristics of circuits were analysed. The results exhibited that the proposed models relatively deliver reduced power consumption; inter capacitance, delay and fringe capacitance with whale optimization technique in CNFET circuits. The CNFET technology with whale optimization model ensures enhancement in current voltage characteristics.

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