Process Improvements for Reductions in Total Charge and Interface Trap Densities of Thermally-Grown Sub-3.5nm-Thick Silicon Nitrides

Abstract

ABSTRACTUltra-thin silicon nitride films are being studied for use as high-dielectric constant (highk) materials in future gate dielectric applications, as Complementary Metal-Oxide-Semiconductor (CMOS) transistors are scaled down to the sub-100nm regime. In this study, process modifications are proposed to reduce the total charge and interface trap densities in sub-3.5 nm-thick silicon nitride films, grown in NH3, in a conventional furnace at 900°C and 1 atm. It is shown that by employing a short (<1 min) oxynitridation step in NO, before nitridation, and oxynitridation/Ar-annealing steps, after nitridation, silicon nitride films can be thermally grown with a total charge density as low as about 2.5E10 q/cm2 and an interface trap density of about 2.1E11/(eV-cm2). Besides, the effect of using NO as opposed to N2O for oxynitridation steps is also discussed.