Process and device optimization of an analog complementary bipolar IC technology with 5.5-GHz f/sub T/ pnp transistors

Abstract

An analog complementary bipolar IC process has been developed featuring 9.0-GHz f/sub T/ npn and 5.5-GHz f/sub T/ pnp transistors. Process conditions for emitter, base, and collector of pnp transistors are optimized in order to achieve the best performance tradeoff between current gain, Early voltage, and cutoff frequency. With the optimized process conditions, the H/sub FE//spl times/V/sub A/ of pnp transistors is 350 V with f/sub T/ of 5.5 GHz and f/sub max/ of 8.5 GHz. These high performance pnp transistors have been integrated into an existing 9.0-GHz f/sub T/ npn bipolar process without introducing excessive additional process complexity and manufacturing costs. In addition, Schottky diodes, p-channel junction FET's and laser wafer trimmable precision NiCr resistors have been integrated into the process to enhance analog circuit design capability. >