Abstract

Formal verification is fundamental in many phases of digital systems design. The most successful verification procedures employ Ordered Binary Decision Diagrams (OBDDs) as canonical representation for both Boolean circuit specifications and logic designs, but these methods require a large amount of memory and time. Due to these limitations, several models of Decision Diagrams have been studied and other verification techniques have been proposed. In this paper, we have used probabilistic verification with Galois (or finite) field GF(2m) modifying the CUDD package for the computation of signatures in classical OBDDs, and for the construction of Mod2-OBDDs (also known as ?-OBDDs). Mod2-OBDDs have been constructed with a two-level layer of ?-nodes using a positive Davio expansion (pDE) for a given variable. The sizes of the Mod2-OBDDs obtained with our method are lower than the Mod2-OBDDs sizes obtained with other similar methods.

Highlights

  • One of the most important aspects during circuit design is the verification, i.e., checking for functional equivalence

  • The most successful verification procedures employ Ordered Binary Decision Diagrams (OBDDs) as canonical representation for both Boolean circuit specifications and logic designs, but these methods require a large amount of memory and time

  • A very efficient OBDD package (CUDD package from Colorado University) has been modified in order to construct Mod2-OBDD representations of Boolean functions given in multilevel BLIF, and probabilistic verification based on Galois field GF(2m) arithmetic for the equivalence test has been used

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Summary

Introduction

One of the most important aspects during circuit design is the verification, i.e., checking for functional equivalence. Signatures can be computed more efficiently than graph-based representations, consume less time and space, and distinguish any pair of Boolean functions with a very high probability of success By performing several such runs with different random input variable assignments, the resultant algebraic simulation has a probability of error in verification that decreases exponentially from an initially small value [16]. In [21], a fast probabilistic equivalence test for Mod2-OBDDs that requires only a linear number of arithmetic operations is used In this contribution, a very efficient OBDD package (CUDD package from Colorado University) has been modified in order to construct Mod2-OBDD representations of Boolean functions given in multilevel BLIF, and probabilistic verification based on Galois field GF(2m) arithmetic for the equivalence test (signatures comparison) has been used.

Mod2-OBDDs
Probabilistic Verification Using Galois Fields
Including Signatures on CUDD Package
Introduction of -Nodes into the OBDD
Experimental Results
Full Text
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