Abstract
Due to its attractive characteristics, phase change memory (PCM) has emerged as a promising candidate to be used in main memory of embedded systems in the future. However, the write endurance problem has restricted its application in practical. Discussions regarding on hybrid memory page replacement mechanism have dominated research in recent years. Most existing schemes lack the detection for the locality regulations of memory access and do not take migration efficiency into consideration. In this paper, we rethink data access features and conduct further research on inter-reference distance to exploit the locality regulations of workloads in embedded systems. Then, propose a novel page migration scheme, Periodical Reset Optimized Page Migration Scheme (PRO), which is a hardware-software coordination algorithm. PRO largely reduces the number of write operations in PCM with limited swap operations. Meanwhile, it reduces the write operations by an average of 88.75% and decreases the average access time by an average 11.47% compared with the typical migration schemes.
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