Abstract

Inserting malicious sub-circuits that may cause a circuit failure or lead to theft of confidential information from a system containing the logical circuit demands detection of such sub-circuits followed by their masking if possible. We propose an approach to selection of nodes in sequential circuit, where insertion of Trojan Circuit (TC) is likely. The method is based on applying precise (not heuristic) probabilistic calculations of controllability and observability of combinational part internal nodes and algorithms of a transfer sequence detection for a set of internal states. Note that TC may be inserted in an internal node out of working area (don't care set) represented by State Transition Graph (STG). The out of working area states are compactly represented by Reduced Ordered Binary Decision Diagram (ROBDD) that is derived when the precise estimations are being calculated. ROBDD operations characterizing by polynomial complexity are used both for calculation of precise controllability and observability estimations and detection of transfer sequence. As the suggested approach considers facilities of inserting TCs out of the working area, they cannot be detected both under verification and testing in the working area (care set). The technique of masking TCs with rather small overhead is proposed. The experimental results on MCNC benchmarks illustrate applicability of the approach.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call