Abstract
We propose the ion-beam sputtering deposition providing Ti thin films of desired crystallographic orientation and smooth surface morphology not obtainable with conventional deposition techniques such as magnetron sputtering and vacuum evaporation. The sputtering was provided by argon broad ion beams generated by a Kaufman ion-beam source. In order to achieve the optimal properties of thin film, we investigated the Ti thin films deposited on an amorphous thermal silicon dioxide using X-ray diffraction, and atomic force microscopy. We have optimized deposition conditions for growing of thin films with the only (001) preferential orientation of film crystallites, and achieved ultra-low surface roughness of 0.55 nm. The deposited films have been found to be stable upon annealing up to 300 °C which is often essential for envisaging subsequent deposition of piezoelectric AlN thin films.
Highlights
Titanium has been a frequently used material in microelectronics and MEMS technology
In order to achieve the optimal properties of thin film, we investigated the Ti thin films deposited on an amorphous thermal silicon dioxide using X-ray diffraction, and atomic force microscopy
We report on a deposition of Ti thin film with the (001) preferential crystallite orientation growth on amorphous thermal silicon dioxide using a 3-grid radio frequency inductive-coupled plasma (RFICP) Kaufman ion-beam source
Summary
Titanium has been a frequently used material in microelectronics and MEMS technology. Crystallographic orientation of titanium thin films has to be controlled during the deposition process to obtain specific properties (e.g., mechanical, chemical) suitable for an eventually required application [6, 7]. The crystallographic orientation of titanium thin films is crucial for properties of deposited piezoelectric layers [9]. Titanium thin films deposited by the magnetron sputtering generally possess (100), (001), and (101) crystallographic orientations of crystallites parallel to the surface [1]. The deposition of titanium layers was done on substrates (20 9 20) mm diced from 4-inch P-type silicon wafer with the (100) crystallographic orientation and the resistivity of 6–12 X cm covered with thermal silicon dioxide (ON Semiconductor). BV (V) AV (V) BC (mA) RFP (W) Ar flow (sccm) Deposition pressure (mbar) Deposition rate (A /s)
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