Abstract

The authors modeled SiN film etching with hydrofluorocarbon (CHxFy/Ar/O2) plasma considering physical (ion bombardment) and chemical reactions in detail, including the reactivity of radicals (C, F, O, N, and H), the area ratio of Si dangling bonds, the outflux of N and H, the dependence of the H/N ratio on the polymer layer, and generation of by-products (HCN, C2N2, NH, HF, OH, and CH, in addition to CO, CF2, SiF2, and SiF4) as ion assistance process parameters for the first time. The model was consistent with the measured C-F polymer layer thickness, etch rate, and selectivity dependence on process variation for SiN, SiO2, and Si film etching. To analyze the three-dimensional (3D) damage distribution affected by the etched profile, the authors developed an advanced 3D voxel model that can predict the time-evolution of the etched profile and damage distribution. The model includes some new concepts for gas transportation in the pattern using a fluid model and the property of voxels called “smart voxels,” which contain details of the history of the etching situation. Using this 3D model, the authors demonstrated metal–oxide–semiconductor field-effect transistor SiN side-wall etching that consisted of the main-etch step with CF4/Ar/O2 plasma and an over-etch step with CH3F/Ar/O2 plasma under the assumption of a realistic process and pattern size. A large amount of Si damage induced by irradiated hydrogen occurred in the source/drain region, a Si recess depth of 5 nm was generated, and the dislocated Si was distributed in a 10 nm deeper region than the Si recess, which was consistent with experimental data for a capacitively coupled plasma. An especially large amount of Si damage was also found at the bottom edge region of the metal–oxide–semiconductor field-effect transistors. Furthermore, our simulation results for bulk fin-type field-effect transistor side-wall etching showed that the Si fin (source/drain region) was directly damaged by high energy hydrogen and had local variations in the damage distribution, which may lead to a shift in the threshold voltage and the off-state leakage current. Therefore, side-wall etching and ion implantation processes must be carefully designed by considering the Si damage distribution to achieve low damage and high transistor performance for complementary metal–oxide–semiconductor devices.

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