Practical Estimation of Accuracy in Power Hardware-in-the-Loop Simulation Using Impedance Measurements

Abstract

Power hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. While PHIL simulation affords many advantages for flexible testing of power hardware, the accuracy of the experiment can be degraded through the non-ideal aspects of the PHIL interface, including distortion in the frequency domain, delays, and disturbances. This paper presents a practical method to estimate a subset of the closed-loop transfer function accuracy metrics of a PHIL experiment based on impedance measurements from the experiment. The method of assessing the impacts of the PHIL interfaces is demonstrated through application to an experiment in which two simulated systems are coupled through two PHIL interfaces with high bandwidth power amplifiers, enabling comparison of results with those from the ideal system.