Enhanced Current-Type P-HIL Interface Algorithm for Smart Transformers Testing

Abstract

The energy systems are evolving towards the wide integration of power electronics-based technologies, such as electric vehicles. A promising solution to increase the grid controllability is represented by grid-forming converters, such as smart transformers (STs). Being a new technology, the ST experimental testing is a fundamental step before commercialization. Instead of performing time consuming and not flexible on-field tests, the Power Hardware In the Loop (P-HIL) offers a flexible testing environment for experimentally validating new technologies. The real-time simulation of the electrical grid offers the possibility to vary quickly the testing environment, while the power amplification stage offers the validation of the real hardware. Despite the clear testing advantages, the P-HIL stability and testing accuracy is still a matter of study. This paper introduces a new P-HIL interface approach for ST application, that can guarantee high testing accuracy in a large frequency spectrum. The proposed approach combines the tracking capability of the existing controlled Current-Type P-HIL interface algorithm, with the well-known Partial Circuit Duplication approach. The accuracy and stability analysis has been performed analytically and validated by means of extensive experimental P-HIL testing.