Power reduction in energy recovery and square-wave clock distribution networks operating at half frequency with dual-edge triggered flip-flops

Abstract

Dual-edge triggered flip-flops allow the operation of the clock distribution network at half the frequency leading to significant power reduction. We have simulated an energy recovery and a square-wave clock distribution network with 10,240 single-and dual-edge triggered flip-flops at 500 MHz and 250 MHz, respectively. Dual-edge triggering results in a total power reduction of 26% in the energy recovery clock. In square-wave clock distribution network, dual-edge triggering results in a total power reduction of 16%.