Abstract

A novel approach to design low-power area-efficient rail-to-rail output single-stage class-AB operational transconductance amplifiers (OTAs) with enhanced large- and small-signal performance to drive large capacitive loads is presented. It is based on a non-linear nested current mirror at the active load of a splitted differential input pair biased in weak inversion that boosts dynamic currents beyond their quiescent value directly at the output branch. As a result, slew rate, DC gain, gain-bandwidth product, settling time and noise performance are improved without additional circuit elements or power consumption. An OTA prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.9~\mu \text{W}$ </tex-math></inline-formula> from a supply voltage of ±0.5 V and a silicon area of 0.001 mm2. Measurement results validate the advantages of the proposal, exhibiting positive and negative slew rates of 110 V/ms and −58 V/ms, respectively, and a gain-bandwidth product of 136 kHz with a phase margin of 90° for a capacitive load of 160 pF.

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