Abstract
It is shown that the two-dimensional potential variation in buried-channel CCD's can be considered to arise from a number of linearly contributing components. The components arising from the lateral variation in the gate voltage, depletion charge, and signal charge are clearly identified. Both the one- and two-level insulator structures are considered, and it is shown that the two-level structure can be reduced to an equivalent one-level device thereby greatly simplifying the analysis. Simple solutions are obtained for the potential and field variations in the channel region of both types of structure for zero signal charge. From these results, device optimization procedures aimed at minimizing the transfer inefficiency are obtained and applied to one-and two-level CCD's.
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