Abstract
The study and design of a low cost and high performance vertical PNP transistor at BiCMOS process platform is presented. The effect of different device designs on baseline process has been compared in terms of their electrics characteristics simulation result. The performance of PNP has been improved further through process optimization with the aid of process simulation. The fabricated PNP transistor silicon data shows consistent performance with simulation. Finally the performance of PNP device has met the target including current gain above 38, breakdown voltage (BV CEO) over 7 volts and cut-off frequency (f T) 10GHz. Its performance addresses the requirement for high speed circuit design.
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