Placement of the processors of a hypercube

Abstract

The authors formalize the problem of minimizing the length of the longest interprocessor wire as the problem of embedding the processors of a hypercube onto a rectangular mesh, so as to minimize the length of longest wire. Where neighboring nodes of the mesh are taken as being at unit distance from one another, and where wires are constrained to be laid out as horizontal and vertical wires, the length of the wire joining nodes u and v of the mesh equals the graph-theoretic distance between u and v. The problem of minimizing delays due to interprocessor communication is then modeled as the problem of embedding the vertices of a hypercube onto the nodes of a mesh, so as to minimize dilation. Two embeddings which achieve dilations that (for large n) are within 26% of the lower bound for square meshes and within 12% for meshes with aspect ratio 2 are presented. >