Pipelined convolution using Vedic multiplier

Abstract

Convolution is one of the fundamental operations of the signal processing system and it can be employed by types of multiplication. Here linear convolution is performed by Vedic multiplier which is based on one of the sixteen sutras in Vedic mathematics, called UrdhavaTriyagbhyam Sutra. UrdhavaTriyagbhyam multiplier provides better result in speed compared to other conventional multiplier. Pipelining architecture in the multiplier increases the timing performance of the multiplier hence such multiplier is used to compute linear convolution of two sequences. This is a novel approach to compute convolution using pipelining architecture. The simulation and synthesis are performed by using ModelSim and Xilinx ISE Design suite 13.4 and power analysis is performed by using Xilinx Xpower Analyzer. Simulated result for proposed pipelined convolution shows 24.24% lesser propagation delay compared to convolution without using pipelining.