Pipelined architecture based on single flux quantum with resettable latch

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We have already proposed single flux quantum with resettable latch (SFQ-RL). SFQ-RL was proposed as a new SFQ logic, which consists of “L-gate”, “confluence buffer” and “splitter”. We can realize the pipelined circuits easily using SFQ-RL, because the pipelined circuits are constructed by connecting L-gates in series. We have reported the full operation of the half adder based on SFQ-RL before. As the application of SFQ-RL to the more complicated circuits with a pipelined structure, we have designed pipelined carry save serial adder (CSSA). We have confirmed the partial operation of CSSA.