Pipeline Implementation of the Unified CORDIC Algorithm in FPGA

Abstract

This work presents a pipeline implementation of the COordinate Rotation DIgital Computer (CORDIC) algorithm in VHDL. This implementation computes both the trigonometric (sine, cosine, and arctangent of two parameters) and hyperbolic (hyperbolic sine, hyperbolic cosine, and hyperbolic arctangent) fixed-point functions. The implementation was synthesized on a Xilinx ® Zynq UltraScale + ZCU102 FPGA evaluation board, reaching an operating frequency of 297.89 MHz. The results show the proper operation of the proposed architecture, achieving relative errors of less than 1.4% for a 16-bit fixed-point representation. The VHDL implementation is easily adjustable to meet the specific requirements of each system and is available as an open-source code under a Creative Commons license.