Physics of gate leakage current in N-polar InAlN/GaN heterojunction field effect transistors

Abstract

A physics based model of the gate leakage current in N-polar InAlN/GaN heterojunction field effect transistors is demonstrated. The model is based on the space charge limited current flow dominated by the effects of deep traps in the InAlN surface layer. The model predicts accurately the gate-leakage measurement data of the N-polar InAlN/GaN device with InAlN cap layer. In the pinch-off state, the gate leakage current conduction through the surface of the device in the drain access region dominates the current flow through the two dimensional electron gas channel. One deep trap level and two levels of shallow traps are extracted by fitting the model results with measurement data.