Physical Vapor Deposition Barriers for Cu metallization - PVD Barriers

Abstract

Cu is an interstitial impurity in Si and its diffusivity in Si is faster than other transition metals and of the order of 10−5 to 10−7 cm2/s in the temperature range of 200–500°C [1]. Electronically, Cu is a deep-level dopant in Si and forms various donor and acceptor levels, inducing current leakage [2, 3]. In a multilayered device structure, Cu diffuses through a dielectric layer and reaches a Si substrate under electric bias field [4]. In order to prevent Cu diffusion, a barrier layer is necessary at an interface between Cu and the dielectric layers. By the use of high-resistivity barrier metal, the effective resistivity of interconnect lines increases with the advancement of the technology node as shown in Fig. 21.1 [5, 6]. For a fixed barrier thickness of 10 nm, for example, effective resistivity increases rapidly from 2.35 μΩ cm for the 65 nm node to 2.85 μΩ cm for the 32 nm node. Meanwhile, the effective resistivity of 2.2 μΩ cm should be maintained in order to minimize RC delay [7]. This recommendation by the International Technology Roadmap for Semiconductors (ITRS) determines a required barrier thickness at a given technology node. In the 32 nm node, the barrier thickness should be 3.5 nm, approximately 10 atomic layers to prevent interdiffusion between Cu and the dielectric layer. In order to achieve this requirement, a proper barrier material should be deposited using proper deposition techniques and conditions. Wang et al. summarized the published data as of the year 1993 together with their investigation of TiW barrier [8]. Kaloyeros and Eisenbraun [9] published an excellent review of barrier materials as of 2000. In their review article, advantages and limitations of various barrier materials were described in detail based on numerous experimental works by others. Readers can find in this article how and why Ta/TaN barrier had come to use for the Cu interconnect. Since then, technology has rapidly advanced along the line of the ITRS roadmap. Once the technology node entered to a sub-micrometer range, barrier thickness becomes a critical issue to ensure expected performance and reliability of advanced devices. Barrier materials and processes need to be revisited from fundamental viewpoint. In this chapter, the issues of physical vapor deposited (PVD) barrier will be discussed in terms of metallurgical and thermodynamic aspects.