Performance of FinFET based adiabatic logic circuits

Abstract

The heat removal becomes a problem in modern VLSI circuits due to increased power dissipation. To limit the power dissipation adiabatic logic is the most widely used design technique than standard CMOS logic as it does not dissipate energy. Till now number of adiabatic logic families had been implemented using bulk CMOS. The leakage power in the scaled down bulk CMOS devices reduces the energy recovery efficiency of adiabatic logic circuits. The power dissipation of different adiabatic logic families with FinFET devices are compared using 4-bit adder. Due to lower leakage current, higher on-state current, and design flexibility of FinFETs, the adiabatic 4-bit adder implemented using FinFET gives up to 97% power reduction over bulk CMOS circuits.