Performance of Deep-Depletion Buried-Channel $n$-MOSFETs for CMOS Image Sensors

Abstract

Buried-channel (BC) MOSFETs are known to have better noise performance than their surface-channel (SC) counterparts when used as a source follower in modern charge-coupled devices (CCDs). CMOS image sensors are finding increasing applications and compete with CCDs in high-performance imaging, but BC transistors are rarely used in CMOS. As a part of the development of charge storage using CCDs in CMOS, we designed and manufactured deep-depletion BC n-type MOSFETs in 0.18- μm CMOS image sensor process. The BC transistors are designed in a way similar to the source followers in a typical BC CCD, and feature deep n-channel implant and threshold voltage exceeding -2.5 V. In this paper, we report the results from their characterization and compare them with normal enhancement mode and “zero-threshold” SC devices. In addition to the detailed current-voltage and noise measurements, 2-D semiconductor device simulation results are presented to illustrate and understand the different conditions affecting the channel conduction and the noise performance of the BC transistors. We show that under optimal bias conditions the noise performance of the BC transistors can be superior despite their lower gain as in-pixel source followers.