Performance limit of all-wrapped monolayer MoS2 transistors

Abstract

All-wrapped transistors consisting of two-dimensional transition-metal dichalcogenide channels are appealing candidates for post-silicon electronics. Based on the Boltzmann transport theory, here we report a comprehensive theoretical survey on the performance limits for monolayer MoS2 transistors with three prototypical gate dielectrics (Al2O3, HfO2 and BN), by including primary extrinsic charge scattering mechanisms present in practical devices. A concept of “dead space” between the dielectrics and channels is proposed and used in calculation to ameliorate the general overestimation in scattering intensity of surface optical phonons, which enables an accurate description of electronic transport behavior. Crucial device indices, including charge mobility and current density, are thoroughly analyzed for transistors at post-silicon technological nodes beyond 1 nm. The on-state current is estimated to be generally greater than 2 mA μm−1 at channel lengths below 10 nm. The results clarify the potential benefits in performance from extremely miniaturized monolayer-channel transistors for More-Moore electronics.