Performance Investigation on p-Type Si-, Ge-, and Ge–Si Core–Shell Nanowire Schottky Barrier Transistors

Abstract

In this paper, we investigate the working mechanism of p-channel Schottky barrier Ge–Si core–shell nanowire transistors and then study the impact factors on the device performance of Schottky barrier transistors using Si-, Ge-, and Ge–Si core–shell nanowires as channels. For Ge–Si core–shell channel devices, most holes tunnel at the source near the heterojuction and transport in the Ge core region. Ge channel devices can provide the largest drive current and core–shell devices have the smallest sub-threshold slope among above three types of transistors. It is also found that core–shell device's conductive currents vary a little when fixing Ge core radius and changing Si shell thickness, and core–shell devices' normalized drain current can be greatly enhanced by reducing nanowires' radius or increasing core radius. Moreover, the drivability of core–shell devices is insensitive to both silicide/channel and germanide/channel barrier heights, which will further relax the requirement for contact materials.