Performance Improvement of Double-Gate TFET Using Metal Strip Technique

Abstract

In order to overcome the limitations of a tunnel field-effect transistor (TFET) and to enhance its performance, the use of a low work function live strip (LWLS) in a conventional double-gate TFET (DG-TFET) is proposed in this paper. In this novel DG-TFET architecture, named as LWLS-DG-TFET, a metal strip has been implanted in the oxide layer near the source-channel interface. This technique increases the tunneling rate and thus improves the on-current conduction. In this work, a conventional DG-TFET structure in the presence of a metal live strip is studied and analyzed in detail. Moreover, the position of LWLS has been fixed to optimize the TFET performance. The TCAD simulation results show the DC and analog/RF performance improvement of the proposed LWLS-DG-TFET compared to the conventional DG-TFET.