Abstract
Transactional memory (TM) is promising to make parallel programming easier. Many hardware implementations of transactional memory (HTM) have been proposed to improve the performance, but they still suffer from some overheads when a transaction either commits or aborts. So we have been developing a novel new HTM design, called Delayed-Committing TM (DCTM), which enables transactions of arbitrary size to commit or abort in a fixed number of cycles — typically, one. In this paper, we analyze the performance of our DCTM system in detail. Simulation results show that the performance of our DCTM system is as much as 35.7% better than the performance of a conventional HTM system, which has almost no overhead when a transaction aborts but detects conflict and publishes speculatively modified data when a transaction commits. Furthermore, we can expect to improve performance more by increasing the bandwidth of the common bus connecting processing nodes with each other.
Published Version
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