Performance Enhancement for Charge Trapping Memory by Using Al2O3/HfO2/Al2O3 Tri-Layer High-κ Dielectrics and High Work Function Metal Gate

Abstract

In this work, we have fabricated and systematically characterized a type of charge trapping memory (CTM) device with Al2O3/HfO2/Al2O3 tri-layer high-κ dielectric stacks and high work function tungsten metal gate (named as MAHAS in short). The extracted interface state density (Dit) value for the MAHAS memory is comparatively low owing to the optimized high-κ/Si interface quality using SiO2 ultrathin film (∼10 Å) grown by deionized water/O3. The MAHAS memory devices demonstrate desirable memory effects, especially significantly improved program and erase (P/E) speed. A large hysteresis memory window of 5.4 V by ± 10 V sweeping voltage and ∼2.7 V flat-band voltage shift by programming at +7 V for 100 μs are obtained. With respect to memory reliability, the MAHAS memory shows negligible memory window degradation after 106 P/E cycles, and the memory window retains 72.4% of the originally stored charge even after 105 s’ retention. With the simple structure and improved operation efficiency, the proposed MAHAS memory device is promising for future nonvolatile charge trapping memory applications.