Abstract
In this paper a theoretical comparison between the performance of switched-capacitor (SC) and switched-current (SI) pipeline analog-to-digital converters (ADCs) is presented. Power dissipation and die area of SC and SI implementations are compared based on linearity and noise constraints. It is shown that if nonlinearity errors of the class AB SI ADCs are removed by calibration, their performance prevails that of the SC ADCs. Also it is shown that class AB SI ADCs occupy less die area than SC ADCs for a given resolution.
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