Abstract
This paper presents the implementation and analysis of GNRFET and Conventional CMOS based 1-bit and multi-bit Arithmetic Logic Unit (ALU). The simulation results calculated using HSPICE have reported to show 2.79% reduction in Propagation Delay (PD), 57.59% reduction in Average Power Consumption, 61.98% reduction in Power Delay Product (PDP) and 66.44% reduction in Energy Delay Product (EDP) for GNRFET base 1-bit ALU as compared to Conventional CMOS based 1-bit ALU at 32nm technology.
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