Performance Aspects of Sparse Matrix-Vector Multiplication

I Šimeček

doi:10.14311/826

Abstract

Sparse matrix-vector multiplication (shortly SpM×V) is an important building block in algorithms solving sparse systems of linear equations, e.g., FEM. Due to matrix sparsity, the memory access patterns are irregular and utilization of the cache can suffer from low spatial or temporal locality. Approaches to improve the performance of SpM×V are based on matrix reordering and register blocking [1, 2], sometimes combined with software-pipelining [3]. Due to its overhead, register blocking achieves good speedups only for a large number of executions of SpM×V with the same matrix A.We have investigated the impact of two simple SW transformation techniques (software-pipelining and loop unrolling) on the performance of SpM×V, and have compared it with several implementation modifications aimed at reducing computational and memory complexity and improving the spatial locality. We investigate performance gains of these modifications on four CPU platforms.

Highlights

Sparse matrix-vector multiplication is an important building block in algorithms solving sparse systems of linear equations, e.g., FEM
The first nonzero element of row j is stored at index adr[j] in array A
The data is represented as in the Compressed sparse row (CSR) format, but the rows are sorted by length in increasing order

Summary

Šimeček

Sparse matrix-vector multiplication (shortly SpM×V) is an important building block in algorithms solving sparse systems of linear equations, e.g., FEM. The memory access patterns are irregular and utilization of the cache can suffer from low spatial or temporal locality. Approaches to improve the performance of SpM×V are based on matrix reordering and register blocking [1, 2], sometimes combined with software-pipelining [3]. Register blocking achieves good speedups only for a large number of executions of SpM×V with the same matrix A. We have investigated the impact of two simple SW transformation techniques (software-pipelining and loop unrolling) on the performance of SpM×V, and have compared it with several implementation modifications aimed at reducing computational and memory complexity and improving the spatial locality.

Storage schemes for sparse matrices

Code restructuring

Improving the performance of sparse matrix-vector multiplication

HW and SW configuration

Evaluation of the results:

Conclusion