Performance and Variability Analysis on 7nm FINFET Circuits at Near Threshold

Abstract

This paper studies the performance and variability characteristics of 7nm FINFET circuits. Studies are carried out on XOR gate implemented with CMOS and Pass Transistor Logic (PTL) in CADENCE tool adopting 7nm FINFET High Performance Predictive Technology Models. Different supply voltages and temperature conditions are applied to measure the Power Delay Product (PDP) at various operating conditions. The result obtained shows 99% reduction in PDP value by using PTL compared to CMOS logic in near threshold at room temperatures. Also, we observe 12% and 5% average variation in PDP values at 27°C and 125°C respectively for PTL logic compared to 18% and 8% at 27°C and 125°C respectively for CMOS logic at near threshold operation.