Performance Analysis of UTB and Nanowire Tunnel FET by varying various Device Intrinsic Parameters

Abstract

This paper systematically investigates three types of Tunnel Field Effect Transistors (TFET) namely, the single-gated Ultra-Thin Bodies (UTB), double-gated UTB, and the gate-all-around nanowire TFET by varying different parameters and performing simulations to understand the underlying physics. Channel length, channel thickness, and oxide thickness are the three parameters that are varied to know the effects on the drain current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</inf> ) - gate voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> ) characteristics, the ON-state and OFF-state curves, and complex band structures. Performance analysis of TFETs constructed with various materials has been conducted in terms of their ON-OFF current ratios. The simulations have been accomplished using the Tunnel FET compact model tool based on analytic modeling and the WKB method. It can be observed that nanowire provides greater OFF current than double gate UTB. GaAs nanowire TFET provides approximately 93% more OFF current than GaAs UTB TFET. The UTB TFET shows 90.7 % more ON current compared to the GaAs nanowire TFET with other parameters at optimal range and oxide thickness of 5nm. Current depends on the potential barrier between the valence band of source and conduction band of intrinsic region. It is observed that on increasing the channel thickness and oxide thickness the ON-OFF current ratio decreases. In comparison, when the channel length is increased, there is a smaller drain current.