Performance Analysis of Graphene-Based Field-Effect Transistors in Ternary Logic: A Review

Abstract

Considering the development of carbon nanotube field-effect transistors (CNTFETs) and graphene nanoribbon FETs (GNRFETs), this paper presents a review of previous work. The ternary logic design is promising than the conventional binary logic as it offers reduced interconnects, fast computations, and reduced area. Hence, the ternary logic is introduced in both CNTFET and GNRFET-based circuits. Using the basic gates such as standard ternary inverter (STI), positive ternary inverter (PTI), negative ternary inverter (NTI), NAND gate, and NOR gate, the complex circuits are designed. The complex circuits such as half adder, one-bit multiplier, memory cell, and multiplier are designed. All the designs are simulated in HSPICE to verify the correctness. From the observations, it is noticed that the GNRFET-based ternary circuits provide high performance for future integrated circuits (ICs) over the CNTFET circuits.