Abstract
A Double Gate(DG) FinFET is designed in 30nm, 60nm technology with thickness of dielectric ranging from 1.2nm to 2.5nm and the observations are studied. Then DIBL of the device is calculated. The Double Gate(DG) FinFET is one of the promising devices to extend the CMOS technology beyond the scaling limit of conventional CMOS technology. DG FinFET has an excellent scalability and better short channel effect immunity compared to normal MOSFET device. High-k dielectric can be used in DG FinFET. While using the high-k dielectric it reduces the problems associated with gate leakage and increases the drain current. Sentaurus TCAD tool is used to find out the performance of the devices.
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