Performance Analysis of Current-Mode Interconnect System in Presence of Process, Voltage, and Temperature Variations

Abstract

The present paper analyzes process, voltage and temperature variation effects in current-mode (CM) interconnect system. CM signaling is considered as one of the advanced signaling schemes and effective in achieving high performance in integrated circuits. The impact of variability has been accessed using technology scaling, parametric and process corner analyses. It is analyzed that FF process corner model is the fastest while SS model results in least power dissipation in the circuit. Parametric sensitivity analysis reveals that variation in threshold voltage and supply voltage dominantly impacts the propagation delay and power dissipation, respectively, in the system. The variability effects in CM interconnect system are analyzed for scaled technology nodes from 130 to 32 nm. SPICE is used for simulative analyses.