Pentacene thin-film transistors on polymeric gate dielectric: device fabrication and electrical characterization

Abstract

Pentacene thin-film transistors using polymethyl methacrylate as a gate dielectric have been fabricated. A bottom gate, inverted staggered structure was selected to study the influence of the dielectric on the device performance. Crystalline silicon wafers and polyethylenenaphtalate polymer foils were used as substrates. Pentacene thin-films were deposited by thermal evaporation in a high-vacuum system. The maximum process temperature was 170 °C, corresponding to the baking of polymethyl methacrylate. These devices showed satisfactory p-type electrical characteristics with on/off ratios exceeding 10 3 for V GS ranging from −30 to 30 V. The field-effect mobility and threshold voltage were around 0.01 cm 2 V −1 s −1 and −14 V, respectively. The polymethyl methacrylate dielectric also seems to provide some advantages of the so-called self-assembling monolayers.