Pass-transistor logic design

Abstract

Logic functions implemented using CMOS transmission gates provide a moderate improvement in area and speed over logic gate implementations. Several techniques for the implementation of pass transistor logic are presented. These techniques use only nMOS transistors in the pass network. The output logic level is restored using additional circuitry. The proposed designs require less silicon area, less power dissipation, and operate at higher speeds compared with the conventional CMOS pass-transistor networks. The speed of operation depends mainly on the circuitry used to restore the output signal of the pass network. The different techniques are compared with respect to the layout area and operating speed.