Particle-free wafer cleaning and drying technology : H. Mishima, T. Yasui, T. Mizuniwa, M. Abe and T. Ohmi. IEEE Trans. Semicond. Mfg2(3), 69 (1989)

Abstract

Using SiSiGe heteroepitaxy grown by solid-sources (SS) molecular beam epitaxy (MBE) on LOCOS-patterned wafers, an n-p-n Si/SiGe/Si heterojunction bipolar transistor (HBT) which is isolated by a polysilicon-filled trench has been fabricated. Unlike other SiGe HBTs using a metallic salicide process, in this proposed device a titanium disilicide (TiSi2) base electrode layer is formed by deposition and patterning of an amorphous TiSi2.x (x = 0–0.9) layer on the SiGe base layer using selective wet etching. In view of a lower thermal budget furnace annealing at 840°C has only been applied for the drive-in and activation of arsenic (As) implanted in the polysilicon-emitter. The Si/Si0.85Ge0.15/Si n-p-n HBT with a 1 × 4 μm2 mask size emitter typically shows a common-emitter current gain of 118, an Early voltage in the range of 150–170 V, a breakdown voltage BVceo of 7.8 V, a unity current gain frequency fT of 20 GHz, and a maximum oscillation frequency fmax of 15 GHz. Considering the theoretical limit of fT vs BVceo, the performance of our device is near the limit and demonstrates a potential for high frequency analog IC applications.