Abstract
Today’s mobile networks are moving towards creating base stations and mobile stations that are compatible with many standards simultaneously. One way of achieving it is to reconfigure and time multiplex the processing resources based on the present necessity. Field Programmable Gate Arrays have become one of the best choices for implementing digital signal processing and Software Defined Radio platforms due to advancements in VLSI over the past few decades. Partial Reconfiguration has regained its importance in the last decade and is the one of the best methodologies to implement an Software Defined Radio. This paper presents an implementation of physical layer specifications of IEEE 802.11g using dynamic partial reconfiguration on FPGA. The Orthogonal Frequency Division Multiplexing (OFDM) Physical layer is implemented with various encoding and modulation schemes to achieve different data rates. The design has been implemented in Xilinx Virtex-5 board. Keywords: FPGA, IEEE 802.11g, OFDM, Partial Reconfiguration
Highlights
Software radios are evolving as flexible all-purpose radios that can implement new and different standards or protocols through reprogramming[1]
Field Programmable Gate Arrays (FPGAs) physical bit level programming architecture is desired for digital signal processing algorithms as it is suitable for implementing many arithmetic applications while digital signal processors (DSP) provide a fixed multiply-and-accumulation (MAC) operation support
Simulation result of 2/3 rate 64-QAM Orthogonal Frequency Division Multiplexing (OFDM) is presented in the Figure 6
Summary
Software radios are evolving as flexible all-purpose radios that can implement new and different standards or protocols through reprogramming[1]. FPGAs physical bit level programming architecture is desired for digital signal processing algorithms as it is suitable for implementing many arithmetic applications while DSPs provide a fixed multiply-and-accumulation (MAC) operation support. The OFDM is a multi-carrier system used in various wireless communication standards such as IEEE 802.11a/g, LTE. Partial Reconfigurable Implementation of IEEE802.11g OFDM data rates varying from 6 Mbps to 54 Mbps which involve changing the mapping scheme and encoding scheme. The various mapping schemes are BPSK, 64-QAM and the various coding rates are 1/2, 2/3 and 3/4 Both IEEE 802.16 and IEEE 802.11 systems differ in very few aspects such as the scrambler and an additional Reed Solomon encoder. IEEE 802.11g inspired partially reconfigurable OFDM transmitter module has been implemented on FPGA in this project.
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