Parasitic Oscillation Analysis of Trench IGBT During Short-Circuit Type II Using TCAD-Based Signal Flow Graph Model

Abstract

The oscillation phenomenon of trench-type insulated gate bipolar transistors during short-circuit (SC) type II was investigated experimentally and theoretically. The gate resistance required to suppress oscillations decreased with an increasing collector voltage. The oscillation conditions were calculated from the signal flow graph model using the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${S}$ </tex-math></inline-formula> -parameter based on a technology computer-aided design simulation. The calculation results reproduced the locus of the collector voltage dependence of the experimentally measured gate resistance. The oscillation mechanism was investigated using the device simulation. The response of carrier density modulation at the base-drift layer boundary was found to transmit to the collector side through the electron–hole plasma region during the oscillation, indicating that the transfer characteristics of the carrier density modulation in the drift region at the specific collector voltage influence the collector voltage dependence of the SC oscillation. The influence of circuit parameters on the oscillation was also investigated. An increase in the emitter inductance suppressed the oscillations, whereas an increase in gate inductance increases oscillations.